Embedded systems: System level modeling

System level modeling with open source tools

Industry is facing a crisis in the design of complex hardware/software systems. Due to the increasing complexity, the gap between the generation of a product idea and the realization of a working system is expanding rapidly. To manage complexity and to shorten design cycles, industry is forced to look at system level languages towards specification and design.

This seminar presents system level modeling methodologies based on results from the ARTEMIS SYSMODEL project, which provides an Open Source approach to a set of modeling tools that are made available free of charge. The first part of the seminar will present the System Functionality Framework based on ForSyDe, its implementation in SystemC, and how it can be used in a design flow. The second part will present usage of system level models for exploration and software synthesis, and give an example of a simple industrial application.

Programme, 30 January, 2012



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Professor Jan Madsen, DTU


Concepts for modelling of heterogeneous systems

Associate Professor Ingo Sander, KTH


Modeling of heterogeneous systems in SystemC

PHD. Student Mikkel Jakobsen, DTU


Integrating external models into the design flow

PHD. Student Hosein Attarzadeh, KTH





System-level design space exploration

Professor Jan Madsen, DTU


Towards software synthesis for multicore platforms

Associate Professor Ingo Sander, KTH


Experiences from industry

PHD. Student Mikkel Jakobsen, DTU



Professor Jan Madsen, DTU


Participation in the above programme is free of charge.

For practical reasons we would like you to register. To do so, please send an email to kt@imm.dtu.dk with subject “SYSMODEL”, including your name, title and affiliation.


DTU Meeting Center Building 101A, Room S09

Technical University of Denmark

Anker Engelundsvej 1

2800 Lyngby


Karin Tunder, DTU Informatics, kt@imm.dtu.dk or 4525 3728

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